With the continuous development of display technology, thin film transistor liquid crystal display devices are more and more widely applied.
A display panel of a thin film transistor liquid crystal display device known by the inventor includes a peripheral wiring region in which signal lines inside the display panel are led out by through-hole switching technique. The peripheral wiring region includes a signal line side peripheral wiring region and a gate line side peripheral wiring region. In the signal line side peripheral wiring region, data signal lines are led out by a data metal layer (SD metal layer) for preparing a source electrode and a drain electrode of a thin film transistor via the through-hole switching technique; and in the gate line side peripheral wiring region, gate signal lines are led out by a gate metal layer for preparing a gate electrode of the thin film transistor.
In the manufacturing process, in the peripheral wiring region, the gate signal lines and the data signal lines inside the display panel are led out, and bonding pads are provided to facilitate the connection between the display panel and a chip or an external circuit board, so in general, an array substrate is longer than a color filter substrate, so as to expose a line concentration area of the peripheral wiring portion. In the transmission process during the production of the display panel, the exposed line concentration area tends to be scratched due to collision, glass shards or the like. A typical scratch tends to occur at a metal connecting line area between a sealant frame and a bonding pad area. After a metal connecting line is scratched, data signal voltages cannot be applied to the display panel, and this can cause problems such as an X-line of the panel, which is generally an all-black line in a display area, and a Y-line of the panel.
In order to avoid the above-mentioned defects, the inventor knows that a coating layer made from indium tin oxide (short for ITO) can be adopted. That is to say, an ITO layer is disposed at a position of a metal connecting line between a bonding pad and the edge of a color filter substrate. As illustrated in FIG. 1A, a signal line side metal connecting line area includes a data metal layer 0, a passivation layer 5, an ITO coating layer 6 and an ITO protective layer 7. As illustrated in FIG. 1B, a gate line side metal connecting line area includes a gate metal layer 1, a gate insulating layer 2, a passivation layer 5, an ITO coating layer 6 and an ITO protective layer 7. As illustrated in FIGS. 1A and 1B, a certain distance d is formed between the ITO coating layer 6 and the ITO protective layer 7. Thus, good protection cannot be provided at a position not covered by the ITO coating layer 6 or the ITO protective layer 7. Moreover, even if the positions covered by the ITO layers are expanded, as the ITO layers are relatively thin, the protection degree is also limited.
By adoption of the above-mentioned ITO coating layer, scratches for the gate line side peripheral wiring region can be reduced to a certain degree, but the protective capability for the signal line side peripheral wiring region is still inadequate. Another protective means known by the inventor is that: on the basis of using an ITO coating layer, data signal lines are also subjected to through-hole switching by the gate metal layer to form a signal line side peripheral wiring region. On one hand, as the gate metal layer is formed using one wet etching process, the problem that the wiring of the line concentration area is affected by the defects such as active tail due to the use of dry etching and wet etching for a data metal layer can be avoided. On the other hand, as the data signal lines are subjected to through-hole switching by the gate metal layer to form the signal line side peripheral wiring region, there are also two layers, namely a gate metal layer and a gate insulating layer, at positions, not covered by the ITO coating layer, in the signal line side peripheral wiring region, and hence the influence brought by scratches can be reduced to a certain degree and the probability of the defects such as X-line caused by the wire breakage in the signal line side peripheral wiring region can be reduced.
However, in the above-mentioned protective means, as the protective layer is still relatively thin, the protective capability is also inadequate, and hence the problems such as X-line and Y-line are still relatively severe.